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Low-Temperature Superconductor Technology and Applications at JPLs Micro-devices Laboratory
Low-Temperature Superconductor Technology and Applications at JPLs Micro-devices Laboratory

Caltechs Kavli Nanoscience Institute and JPLs Microdevices Lab

Date: Monday, December 1
Time: 4 to 5 p.m.
Location: 125 Steele - Caltech


Low-Temperature Superconductor Technology and Applications at JPLs Micro-devices Laboratory
Rick LeDuc
Principal Engineer, JPL

Light refreshments will be served after the seminar

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